head	1.9;
access;
symbols
	file-4_20:1.9
	rpm-4_4_8-release:1.3.2.2
	rpm-4_4_7-release:1.3.2.2
	rpm-4_4_6-release:1.3.2.2
	rpm-4_4_5-release:1.3.2.2
	rpm-4_4_4-release:1.3.2.2
	rpm-4_4_3-release:1.3.2.2
	file-4_16:1.8
	jbj_before_tklcpatches:1.3.2.1
	rpm-4_4_2-release:1.3.2.1
	file-4_14:1.6
	pjones-sparse-experiment:1.5.0.2
	rpm-4_4_1-release:1.3.2.1
	file-4_12:1.4
	rpm-4_4-release:1.3
	rpm-4_4:1.3.0.2
	file-4_10:1.3
	file-4_09:1.3
	rpm-file-before:1.2
	rpm42-file-before:1.2
	rpm43-file-before:1.2
	rpm-4_3_1-start:1.2
	rpm-4_3:1.2.0.4
	rpm-4_2:1.2.0.2;
locks; strict;
comment	@# @;


1.9
date	2007.05.09.19.38.34;	author jbj;	state Exp;
branches;
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1.8
date	2005.10.31.19.48.57;	author jbj;	state Exp;
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1.7
date	2005.07.16.21.39.19;	author jbj;	state Exp;
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1.6
date	2005.07.16.21.06.33;	author jbj;	state Exp;
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1.5
date	2005.01.02.21.34.41;	author jbj;	state Exp;
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1.4
date	2005.01.02.21.27.19;	author jbj;	state Exp;
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1.3
date	2004.08.03.20.16.18;	author jbj;	state Exp;
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1.2
date	2003.04.15.20.04.26;	author jbj;	state Exp;
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1.1
date	2003.04.15.16.58.35;	author jbj;	state Exp;
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1.2.4.1
date	2004.12.07.00.57.38;	author jbj;	state Exp;
branches;
next	;


desc
@@


1.9
log
@Virgin file-4.20.
@
text
@
#------------------------------------------------------------------------------
# elf:  file(1) magic for ELF executables
#
# We have to check the byte order flag to see what byte order all the
# other stuff in the header is in.
#
# What're the correct byte orders for the nCUBE and the Fujitsu VPP500?
#
# updated by Daniel Quinlan (quinlan@@yggdrasil.com)
0	string		\177ELF		ELF
>4	byte		0		invalid class
>4	byte		1		32-bit
>4	byte		2		64-bit
>5	byte		0		invalid byte order
>5	byte		1		LSB
>>16	leshort		0		no file type,
>>16	leshort		1		relocatable,
>>16	leshort		2		executable,
>>16	leshort		3		shared object,
# Core handling from Peter Tobias <tobias@@server.et-inf.fho-emden.de>
# corrections by Christian 'Dr. Disk' Hechelmann <drdisk@@ds9.au.s.shuttle.de>
>>16	leshort		4		core file
# Core file detection is not reliable.
#>>>(0x38+0xcc) string	>\0		of '%s'
#>>>(0x38+0x10) lelong	>0		(signal %d),
>>16	leshort		&0xff00		processor-specific,
>>18	leshort		0		no machine,
>>18	leshort		1		AT&T WE32100 - invalid byte order,
>>18	leshort		2		SPARC - invalid byte order,
>>18	leshort		3		Intel 80386,
>>18	leshort		4		Motorola
>>>36	lelong		&0x01000000	68000 - invalid byte order,
>>>36	lelong		&0x00810000	CPU32 - invalid byte order,
>>>36	lelong		0		68020 - invalid byte order,
>>18	leshort		5		Motorola 88000 - invalid byte order,
>>18	leshort		6		Intel 80486,
>>18	leshort		7		Intel 80860,
# The official e_machine number for MIPS is now #8, regardless of endianness.
# The second number (#10) will be deprecated later. For now, we still
# say something if #10 is encountered, but only gory details for #8.
>>18	leshort		8		MIPS,
>>>36	lelong		&0x20		N32
>>18	leshort		10		MIPS,
>>>36	lelong		&0x20		N32
>>18	leshort		8
# only for 32-bit
>>>4	byte		1
>>>>36  lelong&0xf0000000	0x00000000	MIPS-I
>>>>36  lelong&0xf0000000	0x10000000	MIPS-II
>>>>36  lelong&0xf0000000	0x20000000	MIPS-III
>>>>36  lelong&0xf0000000	0x30000000	MIPS-IV
>>>>36  lelong&0xf0000000	0x40000000	MIPS-V
>>>>36  lelong&0xf0000000	0x60000000	MIPS32
>>>>36  lelong&0xf0000000	0x70000000	MIPS64
>>>>36  lelong&0xf0000000	0x80000000	MIPS32 rel2
>>>>36  lelong&0xf0000000	0x90000000	MIPS64 rel2
# only for 64-bit
>>>4	byte		2
>>>>48  lelong&0xf0000000	0x00000000	MIPS-I
>>>>48  lelong&0xf0000000	0x10000000	MIPS-II
>>>>48  lelong&0xf0000000	0x20000000	MIPS-III
>>>>48  lelong&0xf0000000	0x30000000	MIPS-IV
>>>>48  lelong&0xf0000000	0x40000000	MIPS-V
>>>>48  lelong&0xf0000000	0x60000000	MIPS32
>>>>48  lelong&0xf0000000	0x70000000	MIPS64 
>>>>48  lelong&0xf0000000	0x80000000	MIPS32 rel2
>>>>48  lelong&0xf0000000	0x90000000	MIPS64 rel2
>>18	leshort		9		Amdahl - invalid byte order,
>>18	leshort		10		MIPS (deprecated),
>>18	leshort		11		RS6000 - invalid byte order,
>>18	leshort		15		PA-RISC - invalid byte order,
>>>50	leshort		0x0214		2.0
>>>48	leshort		&0x0008		(LP64),
>>18	leshort		16		nCUBE,
>>18	leshort		17		Fujitsu VPP500,
>>18	leshort		18		SPARC32PLUS,
>>18	leshort		20		PowerPC,
>>18	leshort		22		IBM S/390,
>>18	leshort		36		NEC V800,
>>18	leshort		37		Fujitsu FR20,
>>18	leshort		38		TRW RH-32,
>>18	leshort		39		Motorola RCE,
>>18	leshort		40		ARM,
>>18	leshort		41		Alpha,
>>18	leshort		0xa390		IBM S/390 (obsolete),
>>18	leshort		42		Renesas SH,
>>18	leshort		43		SPARC V9 - invalid byte order,
>>18	leshort		44		Siemens Tricore Embedded Processor,
>>18	leshort		45		Argonaut RISC Core, Argonaut Technologies Inc.,
>>18	leshort		46		Renesas H8/300,
>>18	leshort		47		Renesas H8/300H,
>>18	leshort		48		Renesas H8S,
>>18	leshort		49		Renesas H8/500,
>>18	leshort		50		IA-64,
>>18	leshort		51		Stanford MIPS-X,
>>18	leshort		52		Motorola Coldfire,
>>18	leshort		53		Motorola M68HC12,
>>18	leshort		62		x86-64,
>>18	leshort		75		Digital VAX,
>>18	leshort		88		Renesas M32R,
>>18	leshort		94		Tensilica Xtensa,
>>18	leshort		97		NatSemi 32k,
>>18	leshort		0x9026		Alpha (unofficial),
>>20	lelong		0		invalid version
>>20	lelong		1		version 1
>>36	lelong		1		MathCoPro/FPU/MAU Required
>5	byte		2		MSB
>>16	beshort		0		no file type,
>>16	beshort		1		relocatable,
>>16	beshort		2		executable,
>>16	beshort		3		shared object,
>>16	beshort		4		core file,
#>>>(0x38+0xcc) string	>\0		of '%s'
#>>>(0x38+0x10) belong	>0		(signal %d),
>>16	beshort		&0xff00		processor-specific,
>>18	beshort		0		no machine,
>>18	beshort		1		AT&T WE32100,
>>18	beshort		2		SPARC,
>>18	beshort		3		Intel 80386 - invalid byte order,
>>18	beshort		4		Motorola
>>>36	belong		&0x01000000	68000,
>>>36	belong		&0x00810000	CPU32,
>>>36	belong		0		68020,
>>18	beshort		5		Motorola 88000,
>>18	beshort		6		Intel 80486 - invalid byte order,
>>18	beshort		7		Intel 80860,
# only for MIPS - see comment in little-endian section above.
>>18	beshort		8		MIPS,
>>>36	belong		&0x20		N32
>>18	beshort		10		MIPS,
>>>36	belong		&0x20		N32
>>18	beshort		8
# only for 32-bit
>>>4	byte		1
>>>>36  belong&0xf0000000	0x00000000	MIPS-I
>>>>36  belong&0xf0000000	0x10000000	MIPS-II
>>>>36  belong&0xf0000000	0x20000000	MIPS-III
>>>>36  belong&0xf0000000	0x30000000	MIPS-IV
>>>>36  belong&0xf0000000	0x40000000	MIPS-V
>>>>36  belong&0xf0000000	0x60000000	MIPS32
>>>>36  belong&0xf0000000	0x70000000	MIPS64
>>>>36  belong&0xf0000000	0x80000000	MIPS32 rel2
>>>>36  belong&0xf0000000	0x90000000	MIPS64 rel2
# only for 64-bit
>>>4	byte		2
>>>>48	belong&0xf0000000	0x00000000	MIPS-I
>>>>48	belong&0xf0000000	0x10000000	MIPS-II
>>>>48	belong&0xf0000000	0x20000000	MIPS-III
>>>>48	belong&0xf0000000	0x30000000	MIPS-IV
>>>>48	belong&0xf0000000	0x40000000	MIPS-V
>>>>48	belong&0xf0000000	0x60000000	MIPS32
>>>>48	belong&0xf0000000	0x70000000	MIPS64 
>>>>48	belong&0xf0000000	0x80000000	MIPS32 rel2
>>>>48	belong&0xf0000000	0x90000000	MIPS64 rel2
>>18	beshort		9		Amdahl,
>>18	beshort		10		MIPS (deprecated),
>>18	beshort		11		RS6000,
>>18	beshort		15		PA-RISC
>>>50	beshort		0x0214		2.0
>>>48	beshort		&0x0008		(LP64)
>>18	beshort		16		nCUBE,
>>18	beshort		17		Fujitsu VPP500,
>>18	beshort		18		SPARC32PLUS,
>>>36	belong&0xffff00	&0x000100	V8+ Required,
>>>36	belong&0xffff00	&0x000200	Sun UltraSPARC1 Extensions Required,
>>>36	belong&0xffff00	&0x000400	HaL R1 Extensions Required,
>>>36	belong&0xffff00	&0x000800	Sun UltraSPARC3 Extensions Required,
>>18	beshort		20		PowerPC or cisco 4500,
>>18	beshort		21		64-bit PowerPC or cisco 7500,
>>18	beshort		22		IBM S/390,
>>18	beshort		23		Cell SPU,
>>18	beshort		24		cisco SVIP,
>>18	beshort		25		cisco 7200,
>>18	beshort		36		NEC V800 or cisco 12000,
>>18	beshort		37		Fujitsu FR20,
>>18	beshort		38		TRW RH-32,
>>18	beshort		39		Motorola RCE,
>>18	beshort		40		ARM,
>>18	beshort		41		Alpha,
>>18	beshort		42		Renesas SH,
>>18	beshort		43		SPARC V9,
>>18	beshort		44		Siemens Tricore Embedded Processor,
>>18	beshort		45		Argonaut RISC Core, Argonaut Technologies Inc.,
>>18	beshort		46		Renesas H8/300,
>>18	beshort		47		Renesas H8/300H,
>>18	beshort		48		Renesas H8S,
>>18	beshort		49		Renesas H8/500,
>>18	beshort		50		IA-64,
>>18	beshort		51		Stanford MIPS-X,
>>18	beshort		52		Motorola Coldfire,
>>18	beshort		53		Motorola M68HC12,
>>18	beshort		73		Cray NV1,
>>18	beshort		75		Digital VAX,
>>18	beshort		88		Renesas M32R,
>>18	beshort		94		Tensilica Xtensa,
>>18	beshort		97		NatSemi 32k,
>>18	beshort		0x9026		Alpha (unofficial),
>>18	beshort		0xa390		IBM S/390 (obsolete),
>>20	belong		0		invalid version
>>20	belong		1		version 1
>>36	belong		1		MathCoPro/FPU/MAU Required
# Up to now only 0, 1 and 2 are defined; I've seen a file with 0x83, it seemed
# like proper ELF, but extracting the string had bad results.
>4      byte            <0x80
>>8	string		>\0		(%s)
>8	string		\0
>>7	byte		0		(SYSV)
>>7	byte		1		(HP-UX)
>>7	byte		2		(NetBSD)
>>7	byte		3		(GNU/Linux)
>>7	byte		4		(GNU/Hurd)
>>7	byte		5		(86Open)
>>7	byte		6		(Solaris)
>>7	byte		7		(Monterey)
>>7	byte		8		(IRIX)
>>7	byte		9		(FreeBSD)
>>7	byte		10		(Tru64)
>>7	byte		11		(Novell Modesto)
>>7	byte		12		(OpenBSD)
# VMS Itanium added by gerardo.cacciari@@gmail.com
>8      string          \2
>>7     byte            13              (OpenVMS)
>>7	byte		97		(ARM)
>>7	byte		255		(embedded)
@


1.8
log
@Update to virgin file-4.16.
@
text
@d87 1
a87 1
>>18	leshort		42		Hitachi SH,
d91 4
a94 4
>>18	leshort		46		Hitachi H8/300,
>>18	leshort		47		Hitachi H8/300H,
>>18	leshort		48		Hitachi H8S,
>>18	leshort		49		Hitachi H8/500,
d99 1
a99 1
>>18	leshort		62		AMD x86-64,
d102 1
d170 1
a170 1
>>18	beshort		21		cisco 7500,
d172 1
d181 1
a181 1
>>18	beshort		42		Hitachi SH,
d185 4
a188 4
>>18	beshort		46		Hitachi H8/300,
>>18	beshort		47		Hitachi H8/300H,
>>18	beshort		48		Hitachi H8S,
>>18	beshort		49		Hitachi H8/500,
d196 1
d221 3
@


1.7
log
@Re-apply FC5 patches.
@
text
@a13 9
# only for MIPS - in the future, the ABI field of e_flags should be used.
>>18	leshort		8
>>>36	lelong		&0x20		N32
>>18	leshort		10
>>>36	lelong		&0x20		N32
>>18	beshort		8
>>>36	belong		&0x20		N32
>>18	beshort		10
>>>36	belong		&0x20		N32
d17 22
d42 5
a46 1
>>18    leshort		8
a68 23
>>16	leshort		0		no file type,
>>16	leshort		1		relocatable,
>>16	leshort		2		executable,
>>16	leshort		3		shared object,
# Core handling from Peter Tobias <tobias@@server.et-inf.fho-emden.de>
# corrections by Christian 'Dr. Disk' Hechelmann <drdisk@@ds9.au.s.shuttle.de>
>>16	leshort		4		core file
# Core file detection is not reliable.
#>>>(0x38+0xcc) string	>\0		of '%s'
#>>>(0x38+0x10) lelong	>0		(signal %d),
>>16	leshort		&0xff00		processor-specific,
>>18	leshort		0		no machine,
>>18	leshort		1		AT&T WE32100 - invalid byte order,
>>18	leshort		2		SPARC - invalid byte order,
>>18	leshort		3		Intel 80386,
>>18	leshort		4		Motorola
>>>36	lelong		&0x01000000	68000 - invalid byte order,
>>>36	lelong		&0x00810000	CPU32 - invalid byte order,
>>>36	lelong		0		68020 - invalid byte order,
>>18	leshort		5		Motorola 88000 - invalid byte order,
>>18	leshort		6		Intel 80486,
>>18	leshort		7		Intel 80860,
>>18	leshort		8		MIPS,
d108 19
d128 5
a132 1
>>18    beshort		8
a154 20
>>16	beshort		0		no file type,
>>16	beshort		1		relocatable,
>>16	beshort		2		executable,
>>16	beshort		3		shared object,
>>16	beshort		4		core file,
#>>>(0x38+0xcc) string	>\0		of '%s'
#>>>(0x38+0x10) belong	>0		(signal %d),
>>16	beshort		&0xff00		processor-specific,
>>18	beshort		0		no machine,
>>18	beshort		1		AT&T WE32100,
>>18	beshort		2		SPARC,
>>18	beshort		3		Intel 80386 - invalid byte order,
>>18	beshort		4		Motorola
>>>36	belong		&0x01000000	68000,
>>>36	belong		&0x00810000	CPU32,
>>>36	belong		0		68020,
>>18	beshort		5		Motorola 88000,
>>18	beshort		6		Intel 80486 - invalid byte order,
>>18	beshort		7		Intel 80860,
>>18	beshort		8		MIPS,
@


1.6
log
@Update to virgin file-4.14.
@
text
@d101 1
a101 1
>>18	leshort		50		IA-64 (Intel 64 bit architecture)
d190 1
a190 1
>>18	beshort		50		Intel Merced Processor,
@


1.5
log
@Add RH patches.
@
text
@d101 1
a101 1
>>18	leshort		50		IA-64,
d190 1
a190 1
>>18	beshort		50		IA-64,
@


1.4
log
@Upgrade to file-4.12.
@
text
@d101 1
a101 1
>>18	leshort		50		IA-64 (Intel 64 bit architecture)
d190 1
a190 1
>>18	beshort		50		Intel Merced Processor,
@


1.3
log
@Upgrade to file-4.09.
@
text
@d107 1
d196 1
@


1.3.2.1
log
@Upgrade to file-4.12 (with RH patches).
@
text
@d101 1
a101 1
>>18	leshort		50		IA-64,
a106 1
>>18	leshort		88		Renesas M32R,
d189 1
a189 1
>>18	beshort		50		IA-64,
a194 1
>>18	beshort		88		Renesas M32R,
@


1.3.2.2
log
@- update to file-4.16 internal.
@
text
@d14 9
a25 22
>>16	leshort		0		no file type,
>>16	leshort		1		relocatable,
>>16	leshort		2		executable,
>>16	leshort		3		shared object,
# Core handling from Peter Tobias <tobias@@server.et-inf.fho-emden.de>
# corrections by Christian 'Dr. Disk' Hechelmann <drdisk@@ds9.au.s.shuttle.de>
>>16	leshort		4		core file
# Core file detection is not reliable.
#>>>(0x38+0xcc) string	>\0		of '%s'
#>>>(0x38+0x10) lelong	>0		(signal %d),
>>16	leshort		&0xff00		processor-specific,
>>18	leshort		0		no machine,
>>18	leshort		1		AT&T WE32100 - invalid byte order,
>>18	leshort		2		SPARC - invalid byte order,
>>18	leshort		3		Intel 80386,
>>18	leshort		4		Motorola
>>>36	lelong		&0x01000000	68000 - invalid byte order,
>>>36	lelong		&0x00810000	CPU32 - invalid byte order,
>>>36	lelong		0		68020 - invalid byte order,
>>18	leshort		5		Motorola 88000 - invalid byte order,
>>18	leshort		6		Intel 80486,
>>18	leshort		7		Intel 80860,
d29 1
a29 5
>>18	leshort		8		MIPS,
>>>36	lelong		&0x20		N32
>>18	leshort		10		MIPS,
>>>36	lelong		&0x20		N32
>>18	leshort		8
d52 23
a113 19
>>16	beshort		0		no file type,
>>16	beshort		1		relocatable,
>>16	beshort		2		executable,
>>16	beshort		3		shared object,
>>16	beshort		4		core file,
#>>>(0x38+0xcc) string	>\0		of '%s'
#>>>(0x38+0x10) belong	>0		(signal %d),
>>16	beshort		&0xff00		processor-specific,
>>18	beshort		0		no machine,
>>18	beshort		1		AT&T WE32100,
>>18	beshort		2		SPARC,
>>18	beshort		3		Intel 80386 - invalid byte order,
>>18	beshort		4		Motorola
>>>36	belong		&0x01000000	68000,
>>>36	belong		&0x00810000	CPU32,
>>>36	belong		0		68020,
>>18	beshort		5		Motorola 88000,
>>18	beshort		6		Intel 80486 - invalid byte order,
>>18	beshort		7		Intel 80860,
d115 1
a115 5
>>18	beshort		8		MIPS,
>>>36	belong		&0x20		N32
>>18	beshort		10		MIPS,
>>>36	belong		&0x20		N32
>>18	beshort		8
d138 20
@


1.3.2.3
log
@Upgrade to file-4.20 internal.
@
text
@d87 1
a87 1
>>18	leshort		42		Renesas SH,
d91 4
a94 4
>>18	leshort		46		Renesas H8/300,
>>18	leshort		47		Renesas H8/300H,
>>18	leshort		48		Renesas H8S,
>>18	leshort		49		Renesas H8/500,
d99 1
a99 1
>>18	leshort		62		x86-64,
a101 1
>>18	leshort		94		Tensilica Xtensa,
d169 1
a169 1
>>18	beshort		21		64-bit PowerPC or cisco 7500,
a170 1
>>18	beshort		23		Cell SPU,
d179 1
a179 1
>>18	beshort		42		Renesas SH,
d183 4
a186 4
>>18	beshort		46		Renesas H8/300,
>>18	beshort		47		Renesas H8/300H,
>>18	beshort		48		Renesas H8S,
>>18	beshort		49		Renesas H8/500,
a193 1
>>18	beshort		94		Tensilica Xtensa,
a217 3
# VMS Itanium added by gerardo.cacciari@@gmail.com
>8      string          \2
>>7     byte            13              (OpenVMS)
@


1.2
log
@Merge file-4.02 changes.
@
text
@d15 4
d20 1
d22 1
a22 1
>>>36   belong          &0x20           N32
d85 1
d92 1
d101 1
a101 1
>>18	leshort		50		IA-64,
d172 1
d189 1
a189 1
>>18	beshort		50		IA-64,
d197 1
d201 4
a204 1
>8	string		>\0		(%s)
@


1.2.4.1
log
@- port to internal file-4.10 libmagic rather than libfmagic.
@
text
@a14 4
>>18	leshort		8
>>>36	lelong		&0x20		N32
>>18	leshort		10
>>>36	lelong		&0x20		N32
a15 1
>>>36	belong		&0x20		N32
d17 1
a17 1
>>>36	belong		&0x20		N32
a79 1
>>18	leshort		22		IBM S/390,
a85 1
>>18	leshort		0xa390		IBM S/390 (obsolete),
d94 1
a94 1
>>18	leshort		50		IA-64 (Intel 64 bit architecture)
a164 1
>>18	beshort		22		IBM S/390,
d181 1
a181 1
>>18	beshort		50		Intel Merced Processor,
a188 1
>>18	beshort		0xa390		IBM S/390 (obsolete),
d192 1
a192 4
# Up to now only 0, 1 and 2 are defined; I've seen a file with 0x83, it seemed
# like proper ELF, but extracting the string had bad results.
>4      byte            <0x80
>>8	string		>\0		(%s)
@


1.2.2.1
log
@Merge from top-of-stack.
@
text
@@


1.1
log
@Move magic creation to sub-directory.
@
text
@d100 1
d187 1
@

